On Wednesday, June 1, 2016 1:08:59 PM CEST Krzysztof Hałasa wrote: > Bjorn Helgaas <bhelgaas@xxxxxxxxxx> writes: > > > This reverts commit 498a92d42596a7a32c042319eb62a4c3d8081cf1. > > > > Krzysztof reported that this change broke Cavium CNS3xxx, ARMv6 (Laguna > > GW-2388) because the MRRS setting is never written to the hardware. > > > > Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> > > CC: Arnd Bergmann <arnd@xxxxxxxx> > > CC: Krzysztof Hałasa <khalasa@xxxxxxx> > > --- > > arch/arm/mach-cns3xxx/pcie.c | 71 ++++++++++++++++++++++++------------------ > > 1 file changed, 41 insertions(+), 30 deletions(-) > > This, applied to v4.7-rc1, fixes the problem on my Laguna boards. > > Tested-by: Krzysztof Hałasa <khalasa@xxxxxxx> > > And as well > > Acked-by: Krzysztof Hałasa <khalasa@xxxxxxx> Thank! Obviously, I'd rather not bring back the gcc warning or the potential stack overflow (however unlikely). What exactly is the problem we are seeing, and is there a way to fix it on top of my patch? Are we perhaps just missing a call to pcie_bus_configure_settings()? Note that cns3xxx is in a bit of an odd state, as only half of the platform code is even present in the kernel, and there is no effort to change that. As far as I know, the board that this was tested on is not present in the mainline kernel, and the board we support is a development system that few people even own at this point. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
