Dear Myron, thank you for your response. Am Montag, den 16.05.2016, 12:02 -0600 schrieb Myron Stowe: > On Sun, May 15, 2016 at 10:56 AM, Paul Menzel wrote: […] > > Is that related to [1]? > > There have been a number of recent kernel commits to work-around know > buggy devices - > v4.6-rc5 > 67e6587 cxgb4: Set VPD size so we can read both VPD structures > cb92148 PCI: Add pci_set_vpd_size() to set VPD size > v4.6 - > 7c20078 PCI: Prevent VPD access for buggy devices > c521b01 PCI: Sleep rather than busy-wait for VPD access completion > 408641e PCI: Fold struct pci_vpd_pci22 into struct pci_vpd > f1cd93f PCI: Rename VPD symbols to remove unnecessary "pci22" > da00684 PCI: Remove struct pci_vpd_ops.release function pointer > 6437907 PCI: Move pci_vpd_release() from header file to pci/access.c > fc0a407 PCI: Move pci_read_vpd() and pci_write_vpd() close to other code > 104daa7 PCI: Determine actual VPD size on first access > c556388 PCI: Use bitfield instead of bool for struct pci_vpd_pci22.busy > f52e562 PCI: Allow access to VPD attributes with size 0 > 9eb45d5 PCI: Update VPD definitions > v4.3 - > da2d03e PCI: Use function 0 VPD only for identical functions > 9d92407 PCI: Fix devfn for VPD access through function 0 > 7aa6ca4 PCI: Add VPD function 0 quirk for Intel Ethernet devices > 932c435 PCI: Add dev_flags bit to access VPD through function 0 > > What were you getting/seeing before? The error wasn’t shown. Sorry if that is not a helpful answer. If I provide more information, please tell me how I can get them. You can find a lot of lspci output for the ASRock E350M1 in coreboot’s board status repository [2]. Thanks, Paul > > [1] https://lkml.org/lkml/2016/4/15/649 [2] http://review.coreboot.org/cgit/board-status.git/tree/asrock/e350m1
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