Hi Gabriele, On Thu, Apr 14, 2016 at 5:22 PM, Jingoo Han <jingoohan1@xxxxxxxxx> wrote: > On Wednesday, April 13, 2016 4:58 PM, Gabriele Paoloni wrote: >> >> Hi Jingoo >> >> On 13 April 2016 06:52, Jingoo Han wrote: >> > On Tuesday, April 12, 2016 6:44 PM, Gabriele Paoloni wrote: [...] >> > > So I will update the driver to call dw_pcie_setup_rc() from >> > > .host_init and ask the BIOS team to update the firmware for next >> > > releases (the driver will be backward compatible anyway). >> > > >> > > Also during my investigation I have noticed that in >> > dw_pcie_setup_rc() >> > > http://lxr.free-electrons.com/source/drivers/pci/host/pcie- >> > designware.c#L762 >> > > >> > > we use pp->mem_base rather than pp->mem_bus_addr to setup >> > > memory base and memory limit in the Type1 header...I think this >> > > is wrong right? Yes. RC's "memory base" and "memory limit" should be governed by PCI addresses and not CPU addresses. So, it should use pp->mem_bus_addr. >> > > Also I do not see why this code is needed at all since we overwrite >> > > this register when we call pci_bus_assign_resources(bus) that >> > > will end up in calling pci_setup_bridge() and then >> > > pci_setup_bridge_mmio()...? >> >> Do you have any comment on this issue above? Probably thats why things are working. Thanks for finding it. I think, /* setup memory base, memory limit */ hunk can be removed from dw_pcie_setup_rc. ~Pratyush -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
