Am Mittwoch, den 23.03.2016, 11:39 +0100 schrieb Roberto Fichera: > On 03/23/2016 11:26 AM, Lucas Stach wrote: > > Hi Lucas, > > > Am Mittwoch, den 23.03.2016, 07:13 -0300 schrieb Fabio Estevam: > >> On Tue, Mar 22, 2016 at 1:36 PM, Roberto Fichera <kernel@xxxxxxxxxxxxx> wrote: > >>> Hi All, > >>> > >>> I'm getting a kernel panic with a kernel v4.4.x when enabling interrupt for 2 cards behind a PCIe-to-PCI bridge > >>> not sharing the same IRQ. If they don't share the same IRQ most often I'm getting a message claiming the emmc > >>> is stuck. I've disabled MSI from PCI config because the cards are not getting any interrupt delivered. > > Is the interrupt-map on your PCIe-to-PCI bridge correct? If it isn't the > > CPU may drown in unhandled IRQ storms. > > Can you please be more specific? Are you talking about INTA/B/C/D mapping? > Yes. If you are using legacy interrupts that are not shared between devices I suppose you are using multiple IRQ pins. The interrupt-map on the i.MX6 PCI controller maps those legacy IRQs to the internal ARM GIC IRQs, but it doesn't say anything about how your bridge maps them. If it doesn't map them 1:1, you need to have an interrupt-map property at the bridge to define how the mapping is done. Regards, Lucas -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
