Intel Broxton PCIe root ports are capable of being suspended runtime so
allow runtime PM for these ports.
Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
---
drivers/pci/pcie/portdrv_pci.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 864c1bdd0e91..43dd23e42c1d 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -436,6 +436,11 @@ static void pcie_portdrv_err_resume(struct pci_dev *dev)
* LINUX Device Driver Model
*/
static const struct pci_device_id port_pci_ids[] = {
+ /* Intel Broxton */
+ { PCI_VDEVICE(INTEL, 0x1ad6), .driver_data = PCIE_PORT_SPT },
+ { PCI_VDEVICE(INTEL, 0x1ad7), .driver_data = PCIE_PORT_SPT },
+ { PCI_VDEVICE(INTEL, 0x5ad8), .driver_data = PCIE_PORT_SPT },
+ { PCI_VDEVICE(INTEL, 0x5ada), .driver_data = PCIE_PORT_SPT },
/* Intel Sunrisepoint */
{ PCI_VDEVICE(INTEL, 0x9d14), .driver_data = PCIE_PORT_SPT },
{ PCI_VDEVICE(INTEL, 0x9d15), .driver_data = PCIE_PORT_SPT },
--
2.7.0
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