On Wed, Jan 20, 2016 at 01:15:04PM -0500, Sinan Kaya wrote:
> Footnote: I remember reading somewhere that some BIOS want to keep track
> of where the endpoints are mapped. Reassigning the resources break such systems.
I agree, I think there are systems where the BIOS sets a PCI BAR value
and depends on that remaining untouched at run-time. For example, I'm
pretty sure there's x86 SMM code that logs errors to PCI management
devices. I think these systems are broken.
I don't think there's a way for firmware to tell the kernel "please
don't reassign these PCI resources." After handoff to the OS, I think
the OS owns all PCI resources and can reassign things as necessary,
subject only to a few constraints like _OSC. Certainly the OS has to
be able to write to BARs at least temporarily to learn their size. I
have no spec reference for this belief.
I don't have a good strategy for dealing with such systems, other
than:
- Keep firmware BAR assignments unless we have a reason to change
them
- Add quirks to set IORESOURCE_PCI_FIXED for specific BARs when we
know about issues
The new PCI "Enhanced Allocation" stuff might be a way for platforms
to do this more safely.
Bjorn
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