Hi guys,
This code in dw_pcie_host_init() looks wrong:
if (!pp->ops->rd_other_conf)
dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1,
PCIE_ATU_TYPE_MEM, pp->mem_base,
pp->mem_bus_addr, pp->mem_size);
dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0);
...
dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val);
Evidently you need to program the ATU with PCIE_ATU_TYPE_MEM before
doing config accesses on the root bus?
If that's the case, what about other config accesses after these few
in dw_pcie_host_init()? I don't see anything that changes the ATU
programming for things coming through dw_pcie_wr_conf().
I assume you need some sort of locking around this sequence:
dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, type, ...
ret = dw_pcie_cfg_read(va_cfg_base + where, size, val);
dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, PCIE_ATU_TYPE_IO, ...
Are you relying on pci_lock? If so, a comment to that effect would be
nice.
The whole ATU management looks pretty inefficient. It's likely that
there'll be a whole sequence of operations where we don't need to
touch the ATU, but since we don't remember its current state, we
configure the whole thing from scratch each time, which is at least
eight register writes (plus a read for the new synchronization).
Bjorn
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