Hi Arnd,
On 11/19/2015 12:31 AM, Arnd Bergmann wrote:
On Wednesday 18 November 2015 17:37:16 Ray Jui wrote:
I haven't spent too much time investigating, and am hoping to eventually
enable affinity support with an incremental patch in the future when I
have more time to investigate.
Is it possible that you have a set of MSIs per GIC interrupt (as Marc
suggested earlier) and that the way it is intended to be used is by
having each one of them target a different CPU? That way you can do
affinity by switching to a different MSI in .set_affinity(), I think
that is how the old style MSI all used to work when each CPU had its
own MSI register.
Arnd
Okay, I see that Xgene MSI has a very similar implementation to support
MSI IRQ affinity. I plan to take a closer look and try it out in the
future. But it likely won't be included in the current round of patch set.
Thanks,
Ray
--
To unsubscribe from this list: send the line "unsubscribe linux-pci" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
