On 06.11.2015 14:22, Jiang Liu wrote:
On 2015/11/6 20:40, Tomasz Nowicki wrote:
On 06.11.2015 12:46, Jiang Liu wrote:
On 2015/11/6 18:37, Tomasz Nowicki wrote:
On 06.11.2015 09:52, Jiang Liu wrote:
Sure, ARM64 (0-16M IO space) QEMU example:
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum
0x3EFF0000, // Translation Offset
0x00010000, // Length
,, , TypeStatic)
The above DWordIO resource descriptor doesn't confirm to the ACPI spec.
According to my understanding, ARM/ARM64 has no concept of IO port
address space, so the PCI host bridge will map IO port on PCI side
onto MMIO on host side. In other words, PCI host bridge on ARM64
implement a IO Port->MMIO translation instead of a IO Port->IO Port
translation. If that's true, it should use 'TypeTranslation' instead
of 'TypeStatic'. And kernel ACPI resource parsing interface doesn't
support 'TypeTranslation' yet, so we need to find a solution for it.
I think you are right, we need TypeTranslation flag for ARM64 DWordIO
descriptors and an extra kernel patch to support it.
How about the attached to patch to support TypeTranslation?
It only passes compilation:)
Based on the further discussion, your draft patch looks good to me.
Lorenzo, do you agree?
Gerry, what would be the best way to approach with this, extra patch of
your set? or keep it separately, might be part of my set.
Thanks,
Tomasz
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