On Wed, Oct 07, 2015 at 04:04:07PM +0000, Keith Busch wrote: > On Tue, 6 Oct 2015, Keith Busch wrote: > >On Tue, 6 Oct 2015, Bjorn Helgaas wrote: > >>>+ resource_list_for_each_entry(entry, &resources) { > >>>+ struct resource *source, *resource = entry->res; > >>>+ > >>>+ if (!i) { > >>>+ resource->start = 0; > >>>+ resource->end = (resource_size( > >>>+ &vmd->dev->resource[0]) >> 20) - 1; > >>>+ resource->flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED; > >> > >>I thought BAR0 was CFGBAR. I missed the connection to a bus number > >>aperture. > > > >Right, BAR0 is the CFGBAR and is the device's aperture to access its > >domain's config space. > > It's a new day, I'll try a new explanation on what this is about. The size > of the CFGBAR determines how many bus numbers can be reached through the > device's config space aperture. We are not setting the bus resource to > BAR0; just determining the bus resource ending based on BAR0's size. We > expect the bar to be 256M to access config space for 256 buses: > > 8 functions * 32 devices * 256 buses * 4k config space per function = 256M > > If the BAR wasn't provided 256M for any reason, we reduce the number of > bus resources this domain can provide. Yep, that makes sense. A comment here about the fact that BAR0 maps ECAM space for the new domain might help. Thanks! Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html