Re: [PATCH v5 3/3] PCI: designware: add sanity checks on the header offset in dw_pcie_cfg_read and dw_pcie_cfg_write

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On Tue, Sep 29, 2015 at 7:27 PM, Gabriele Paoloni
<gabriele.paoloni@xxxxxxxxxx> wrote:
> From: gabriele paoloni <gabriele.paoloni@xxxxxxxxxx>
>
> This patch adds sanity checks on "where" input parameter in
> dw_pcie_cfg_read and dw_pcie_cfg_write. These checks make sure
> that offset passed in by the caller is not in conflict with
> the size of the PCI header field that is being read/written
>

I am still not convinced that we should doubt the caller..But may be I
am biased in my thoughts...
Since Bjorn has asked about it, so will take it.

> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@xxxxxxxxxx>
> ---
>  drivers/pci/host/pcie-designware.c | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index d771fa5..719d2cd 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -82,11 +82,15 @@ static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
>
>  int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val)
>  {

Wouldn't a single check would have been better
+       if ((uintptr_t)addr & (size -1))
+               return PCIBIOS_BAD_REGISTER_NUMBER;

~Pratyush
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