On Wed, Sep 9, 2015 at 10:21 PM, Gabriele Paoloni
<gabriele.paoloni@xxxxxxxxxx> wrote:
> int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val)
> {
> + addr += (where & ~0x3);
Lets see what Jingoo and other have to say on it. IMO, where should be
better kept as an offset within 32 bit word and addr should be 32 bit
aligned. I think this is how where has been considered at other
places like pci-mvebu.c.
> *val = readl(addr);
> -
> - if (size == 1)
> - *val = (*val >> (8 * (where & 3))) & 0xff;
> - else if (size == 2)
> - *val = (*val >> (8 * (where & 3))) & 0xffff;
> - else if (size != 4)
> + where &= 3;
> +
> + if (size == 1) {
> + *val = (*val >> (8 * where)) & 0xff;
> + } else if (size == 2) {
> + if (where & 1)
> + return PCIBIOS_BAD_REGISTER_NUMBER;
Do we really need such cross check? I do not think that any caller is
expected for such misbehave.
~Pratyush
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