Re: PCIe 3.0 AtomicOp capabilities

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On 2015-08-11 10:10, Bjorn Helgaas wrote:

On Mon, Aug 10, 2015 at 1:36 PM, Jay Cornwall <jay@xxxxxxxxxxxx> wrote:

Should the AtomicOp capabilities be similarly enabled if available? Or might
there be a reason for doing this on a per-driver basis?

I'm not very familiar with the AtomicOp functionality, but a quick
skim of the spec suggests that it does have system implications and
should be handled by the core. For example, AtomicOp support is
optional, and it looks like it would be a bad idea to enable it in an
endpoint if the upstream switch didn't support it.

This makes sense, but I think there are some cases in which upstream is ambiguous.

For example, consider a root complex which does not support AtomicOp completion but supports routing to another endpoint which does. Would the necessary condition for enabling AtomicOp requests be that at least one other completion-capable endpoint is reachable?

--
Jay Cornwall
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