>> @@ -210,10 +210,10 @@ int iproc_pcie_setup(struct iproc_pcie *pcie)
>>
>> pcie->sysdata.private_data = pcie;
>>
>> - bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops,
>> + bus = pci_scan_root_bus(pcie->dev, 0, &iproc_pcie_ops,
>> &pcie->sysdata, pcie->resources);
>> if (!bus) {
>> - dev_err(pcie->dev, "unable to create PCI root bus\n");
>> + dev_err(pcie->dev, "unable to scan PCI root bus\n");
>> ret = -ENOMEM;
>> goto err_power_off_phy;
>> }
>
> iproc_pcie_check_link is called here by using the 'bus' structure
> returned from pci_create_root_bus. In iproc_pcie_check_link, we
> configure root bus class to PCI_CLASS_BRIDGE_PCI and validate to ensure
> a stable link between RC and EP can be detected.
Oh, I got it. Thanks for your explanation.
>
>> @@ -227,7 +227,6 @@ int iproc_pcie_setup(struct iproc_pcie *pcie)
>>
>> iproc_pcie_enable(pcie);
>
> Here we enable INTx support for our RC controller.
>
>>
>> - pci_scan_child_bus(bus);
>
> Here, if pci_scan_child_bus is moved to before iproc_pcie_check_link, I
> don't think it would work (although I have not tested this).
>
> An alternative is to use a dummy bus structure to feed into
> iproc_pcie_check_link, and call iproc_pcie_check_link and
> iproc_pcie_enable before pci_scan_root_bus. But the reason I put the
> link check code in between pci_create_root_bus and pci_scan_child_bus
> was to avoid using a dummy bus structure, :)
Maybe we could refactor this by add a new pci_host_bridge_ops in the later patch.
>
>> pci_assign_unassigned_bus_resources(bus);
>> pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
>> pci_bus_add_devices(bus);
>>
>
> Thanks,
>
> Ray
>
> .
>
--
Thanks!
Yijing
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