Re: [PATCH] PCIe: Designware: Do not allow config space through ranges

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On Monday 22 December 2014 12:09:04 Pratyush Anand wrote:
> Config space is need to be allocated using reg property. This patch
> removes possibility of config space allocation through ranges property.
> 
> To: Mohit Kumar <mohit.kumar@xxxxxx>
> To: Jingo Han <jg1.han@xxxxxxxxxxx>
> To: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> To: Shawn Guo <shawn.guo@xxxxxxxxxxxxx>
> Cc: linux-pci@xxxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> Signed-off-by: Pratyush Anand <panand@xxxxxxxxxx>
> ---
>  arch/arm/boot/dts/imx6qdl.dtsi     |  3 +--
>  arch/arm/boot/dts/imx6sx.dtsi      |  8 ++++----

changing the DT files is probably ok.

> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index df781cdf13c1..0b22b42e1ff9 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -409,19 +409,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>  			pp->mem_mod_base = of_read_number(parser.range -
>  							  parser.np + na, ns);
>  		}
> -		if (restype == 0) {
> -			of_pci_range_to_resource(&range, np, &pp->cfg);
> -			pp->cfg0_size = resource_size(&pp->cfg)/2;
> -			pp->cfg1_size = resource_size(&pp->cfg)/2;
> -			pp->cfg0_base = pp->cfg.start;
> -			pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
> -
> -			/* Find the untranslated configuration space address */
> -			pp->cfg0_mod_base = of_read_number(parser.range -
> -							   parser.np + na, ns);
> -			pp->cfg1_mod_base = pp->cfg0_mod_base +
> -					    pp->cfg0_size;
> -		}
>  	}

Since we've allowed this for so long, it may be better to leave this
in for compatibility with old dts files. It would however be good to
print a warning message. We could also limit it to those machines that
are known to have been used with this property in the past.

	Arnd
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