My mutt hang, in case the mail isn't sent out, I resend it.
On Wed, Dec 10, 2014 at 10:15:37PM +0800, Wei Yang wrote:
>On Tue, Dec 09, 2014 at 03:13:49PM -0800, Yinghai Lu wrote:
>>On Tue, Dec 9, 2014 at 1:53 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:
>>> On Tue, Dec 9, 2014 at 2:34 PM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote:
>>>> + list_for_each_entry(window, &bridge->windows, list) {
>>>> + res = window->res;
>>>> + if (resource_type(res) == IORESOURCE_MEM ||
>>>> + res->end > 0xffffffff) {
>>>> + bridge->has_mem64_res = true;
>>>
>>> This is an interesting idea, but I think you're checking CPU addresses
>>> here, and you need to check PCI bus addresses.
>>
>>Looks like those IBM platforms have res > 4g, but pci bus address < 4g.
>>If we check pci bus address, and then we would break those platforms.
>>
Hi, Yinghai
I did some test with patch on my machine. It looks good.
While as Bjorn mentioned, I think we could change it a little. The pci space
on our machine is like this:
cpu address pci address
MEM 0x00003ff280000000..0x00003ff2fffeffff -> 0x00000000 8000 0000
MEM64 0x00003d5000000000..0x00003d5fffffffff -> 0x00003d50 0000 0000
Each root bridge has two MMIO window. From this output we could see the pci
address for 64-bit window is above 4G.
I did a little change on your code, like this
list_for_each_entry(window, &bridge->windows, list) {
res = window->res;
if (resource_type(res) == IORESOURCE_MEM ||
- res->end > 0xffffffff) {
+ (res->end - window->offset) > 0xffffffff) {
bridge->has_mem64_res = true;
break;
}
}
This also works on my machine.
One more question, with this patch, do we still need previous patch for
Marek's problem?
>>Yinghai
>
>--
>Richard Yang
>Help you, Help me
--
Richard Yang
Help you, Help me
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