>>> +void __weak pcibios_set_phb_msi_domain(struct pci_bus *bus)
>>> +{
>>> +}
>>> +
>>> +static void pci_set_bus_msi_domain(struct pci_bus *bus)
>>> +{
>>> + struct pci_dev *bridge = bus->self;
>>> +
>>> + if (!bridge)
>>> + pcibios_set_phb_msi_domain(bus);
>>> + else
>>> + dev_set_msi_domain(&bus->dev, dev_get_msi_domain(&bridge->dev));
>>> +}
>>
>>
>> Hi Marc, we can not assume pci devices under same phb share the same msi irq domain,
>> now in x86, pci devices under the same phb may associate different msi irq domain.
Hi Marc,
>
> Well, this is not supposed to be a perfect solution yet, but instead a
> basis for discussion. What I'd like to find out is:
>
> - What is the minimum granularity for associating a device with its MSI
> domain in existing platforms?
PCI device, after Gerry's msi irq domain patchset which now in linux-next,
in x86, we will find msi irq domain by pci_dev.
I generally agree your first patch which associate basic device with msi irq domain.
> - What topology data structures do you use to find out what MSI
> controller a device should be matched with?
Now only arm and arm64 use msi controller to setup/teardown msi irqs,
in arm, now msi controller saved in pci_sys_data, and for arm64, it seems
to be saved in pci_bus. For a more common method to find msi controller/irq domain,
I prefer pci_dev/device.
> - What in-tree platform already has this requirements?
As mentioned above, x86 does.
Thanks!
Yijing.
>
> Thanks,
>
> M.
>
--
Thanks!
Yijing
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