On Thu, Dec 4, 2014 at 9:34 AM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: > On Wed, Dec 03, 2014 at 05:44:26PM -0800, Yinghai Lu wrote: >> On Wed, Dec 3, 2014 at 4:51 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: >> > I think another way to fix the bug 74151 problem would have been to >> > put the ROMs in the non-prefetchable window and the 64-bit BARs in the >> > 64-bit prefetchable window. >> >> I thought we did that way already. > > Can you point me to the code that does this? I don't see anything in > pbus_size_mem() that treats ROMs differently. Current code: 1. when bridge does not support 64bit mmio pref, ROM bar will be allocated to bridge mmio pref 2. when bridge does support 64bit mmio pref, ROM BAR will be allocated to bridge mmio. so you want to change case 1 to bridge to mmio pref? > > I'm considering reverting 5b28541552ef (assuming that would fix this radeon > regression) because I think the radeon problem is worse than the 74151 > problem and I think we can solve 74151 in a different way. > > Guo, Ben, this would affect you! It's too late to revert 5b28541552ef for > v3.18, but we really need to work on this for v3.19. > > FOr 85491 (the radeon problem), we might be able to work around it by > fixing the bridge window, but I'm not sure we could even get that done > before v3.18. I'll work on that today. shrink bridge mmio pref range instead of reject it? Yinghai -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
