In commit 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while
sizing BARs"), Myron Stowe refactored the code of __pci_read_base() in
order to reduce the amount of time spent with decoding disabled.
However, contrary to what was said in the commit log, the commit does
introduce some functional change: the pci_size() function that used to
be called *before* the BAR size check is done is now called *after*
the BAR size check is done.
This causes some failures on certain platforms (namely ARM Marvell EBU
platforms, equipped for example with a PCIe SATA card, or a PCIe USB3
XHCI controller):
pci 0000:03:00.0: reg 0x10: can't handle BAR larger than 4GB (size 0xfffffffffff00000)
This problem didn't exist before this commit, due to pci_size() being
called before doing the PCI BAR size check. Therefore, this commit
fixes the problem by restoring the initial order of the operation, by
calling pci_size() before doing the PCI BAR size check.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
Fixes: 7ea945f0bb49 ("PCI: Shrink decoding-disabled window while sizing BARs")
---
Note: this fix has been tested to work correctly for me, and the PCI
messages I get are now identical to the ones I was getting with
3.18-rc5. However, please review my patch carefully, as I must admit I
do not fully understand all the implications of the change as well as
the code in __pci_read_base().
Applies on top of pci/next
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
---
drivers/pci/probe.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index db16678..6168ca1 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -246,6 +246,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
if (!sz64)
goto fail;
+ sz64 = pci_size(l64, sz64, mask64);
+
+ if (!sz64) {
+ dev_info(&dev->dev, "%sreg 0x%x: invalid BAR (can't size)\n",
+ FW_BUG, pos);
+ goto fail;
+ }
+
if (res->flags & IORESOURCE_MEM_64) {
if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
sz64 > 0x100000000ULL) {
@@ -268,14 +276,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
}
}
- sz64 = pci_size(l64, sz64, mask64);
-
- if (!sz64) {
- dev_info(&dev->dev, "%sreg 0x%x: invalid BAR (can't size)\n",
- FW_BUG, pos);
- goto fail;
- }
-
region.start = l64;
region.end = l64 + sz64;
--
2.1.0
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