Re: [PATCH] PCI: exynos: Remove unnecessary return statement

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On Thu, Nov 13, 2014 at 7:39 AM, Jingoo Han <jg1.han@xxxxxxxxxxx> wrote:
> On Thursday, November 13, 2014 1:30 AM, Srikanth Thokala wrote:
>>
>> On Wed, Nov 12, 2014 at 8:55 AM, Jingoo Han <jg1.han@xxxxxxxxxxx> wrote:
>> > This patch fixes the following checkpatch warning.
>> >
>> >   WARNING: void function return statements are not generally useful
>> >
>> > Signed-off-by: Jingoo Han <jg1.han@xxxxxxxxxxx>
>> > ---
>> >  drivers/pci/host/pci-exynos.c |    8 --------
>> >  1 file changed, 8 deletions(-)
>> >
>>
>> Acked-by: Srikanth Thokala <sriku.linux@xxxxxxxxx>
>
> Sorry, but your 'Acked-by' is NOT appropriate.
> You are neither a maintainer nor those who contributed the patch
> for Exynos PCIe driver. So, in this case, 'Reviewed-by' looks good
> as below.
>
> Reviewed-by: Srikanth Thokala <sriku.linux@xxxxxxxxx>
>
> By the way, you submitted the Xilinx PCIe driver
> (drivers/pci/host/pcie-xilinx.c). Thus, if someone send
> the patch for Xilinx PCIe driver, you can give your Acked-by.
>
> According to the 'Documentation/SubmittingPatches' file,
>
> "If a person was not directly involved in the preparation or handling of a
> patch but wishes to signify and record their approval of it then they can
> arrange to have an Acked-by: line added to the patch's changelog.
>
> Acked-by: is often used by the maintainer of the affected code when that
> maintainer neither contributed to nor forwarded the patch."
>
> My comment will be also applied to the patch "[PATCH] PCI: imx6: Use tabs
> for indentation".

Thank you for the information, I will keep that in mind.

- Srikanth

>
> Thank you.
>
> Best regards,
> Jingoo Han
>
>>
>> - Srikanth
>>
>> > diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
>> > index c5d0ca3..41ab139 100644
>> > --- a/drivers/pci/host/pci-exynos.c
>> > +++ b/drivers/pci/host/pci-exynos.c
>> > @@ -312,7 +312,6 @@ static void exynos_pcie_assert_reset(struct pcie_port *pp)
>> >         if (exynos_pcie->reset_gpio >= 0)
>> >                 devm_gpio_request_one(pp->dev, exynos_pcie->reset_gpio,
>> >                                 GPIOF_OUT_INIT_HIGH, "RESET");
>> > -       return;
>> >  }
>> >
>> >  static int exynos_pcie_establish_link(struct pcie_port *pp)
>> > @@ -388,7 +387,6 @@ static void exynos_pcie_clear_irq_pulse(struct pcie_port *pp)
>> >
>> >         val = exynos_elb_readl(exynos_pcie, PCIE_IRQ_PULSE);
>> >         exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_PULSE);
>> > -       return;
>> >  }
>> >
>> >  static void exynos_pcie_enable_irq_pulse(struct pcie_port *pp)
>> > @@ -400,7 +398,6 @@ static void exynos_pcie_enable_irq_pulse(struct pcie_port *pp)
>> >         val = IRQ_INTA_ASSERT | IRQ_INTB_ASSERT |
>> >                 IRQ_INTC_ASSERT | IRQ_INTD_ASSERT,
>> >         exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_EN_PULSE);
>> > -       return;
>> >  }
>> >
>> >  static irqreturn_t exynos_pcie_irq_handler(int irq, void *arg)
>> > @@ -429,7 +426,6 @@ static void exynos_pcie_msi_init(struct pcie_port *pp)
>> >         val = exynos_elb_readl(exynos_pcie, PCIE_IRQ_EN_LEVEL);
>> >         val |= IRQ_MSI_ENABLE;
>> >         exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_EN_LEVEL);
>> > -       return;
>> >  }
>> >
>> >  static void exynos_pcie_enable_interrupts(struct pcie_port *pp)
>> > @@ -438,8 +434,6 @@ static void exynos_pcie_enable_interrupts(struct pcie_port *pp)
>> >
>> >         if (IS_ENABLED(CONFIG_PCI_MSI))
>> >                 exynos_pcie_msi_init(pp);
>> > -
>> > -       return;
>> >  }
>> >
>> >  static inline void exynos_pcie_readl_rc(struct pcie_port *pp,
>> > @@ -448,7 +442,6 @@ static inline void exynos_pcie_readl_rc(struct pcie_port *pp,
>> >         exynos_pcie_sideband_dbi_r_mode(pp, true);
>> >         *val = readl(dbi_base);
>> >         exynos_pcie_sideband_dbi_r_mode(pp, false);
>> > -       return;
>> >  }
>> >
>> >  static inline void exynos_pcie_writel_rc(struct pcie_port *pp,
>> > @@ -457,7 +450,6 @@ static inline void exynos_pcie_writel_rc(struct pcie_port *pp,
>> >         exynos_pcie_sideband_dbi_w_mode(pp, true);
>> >         writel(val, dbi_base);
>> >         exynos_pcie_sideband_dbi_w_mode(pp, false);
>> > -       return;
>> >  }
>> >
>> >  static int exynos_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
>> > --
>> > 1.7.9.5
>> >
>> >
>> > --
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