Hi Fabio: Thanks for your comments. > -----Original Message----- > From: Fabio Estevam [mailto:festevam@xxxxxxxxx] > Sent: Monday, September 22, 2014 10:27 PM > To: Zhu Richard-R65037 > Cc: linux-pci-owner@xxxxxxxxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx; Guo Shawn- > R65073; Lucas Stach > Subject: Re: [PATCH v1 4/4] PCI: imx6: add imx6sx pcie support > > Hi Richard, > > On Mon, Sep 22, 2014 at 7:45 AM, Richard Zhu <r65037@xxxxxxxxxxxxx> wrote: > > > +#ifdef CONFIG_PM_SLEEP > > +static int pci_imx_suspend(void) > > +{ > > + int rc = 0; > > + > > + if (is_imx6sx_pcie(imx6_pcie)) { > > + /* PM_TURN_OFF */ > > + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, > > + BIT(16), 1 << 16); > > + udelay(10); > > + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, > > + BIT(16), 0 << 16); > > + } > > + > > + return rc; > > You could get rid of this 'rc' variable and just return 0. > [Richard] OK. Accepted. > > +} > > + > > +static void pci_imx_resume(void) > > +{ > > + struct pcie_port *pp = &imx6_pcie->pp; > > + > > + if (is_imx6sx_pcie(imx6_pcie)) { > > + /* reset iMX6SX PCIe */ > > + regmap_update_bits(imx6_pcie->iomuxc_gpr, > > + IOMUXC_GPR5, BIT(18), 1 << 18); > > + > > + regmap_update_bits(imx6_pcie->iomuxc_gpr, > > + IOMUXC_GPR5, BIT(18), 0 << 18); > > + > > + /* > > + * controller maybe turn off, re-configure again > > + * Set the CLASS_REV of RC CFG header to > > + * PCI_CLASS_BRIDGE_PCI > > + */ > > + writel(readl(pp->dbi_base + PCI_CLASS_REVISION) > > + | (PCI_CLASS_BRIDGE_PCI << 16), > > + pp->dbi_base + PCI_CLASS_REVISION); > > + > > + dw_pcie_setup_rc(pp); > > + } > > +} > > Not related to this patch, but on mx6q/dl we still get kernel hang after > doing suspend/resume when a PCI card is inserted. > > Is this fixed on mx6solox? [Richard] this is a part of the fix on imx6solox. As I know that, there is one similar fix on the next mx6q to. > > Any idea as to how to fix it for mx6q? Best Regards Richard Zhu ��.n��������+%������w��{.n�����{���"�)�� jg��� �����ݢj����G���� ���j:+v���w�m������w�������h�����٥
