On Mon, Sep 15, 2014 at 05:53:05PM +0800, Wei Yang wrote:
> On Mon, Sep 15, 2014 at 12:10:27AM +0200, Andreas Noever wrote:
> ...
> >@@ -840,8 +863,10 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
> >
> > if (max >= bus->busn_res.end) {
> > dev_warn(&dev->dev, "can't allocate child bus %02x from %pR\n",
> >- max, &bus->busn_res);
> >- goto out;
> >+ max + 1, &bus->busn_res);
> >+ /* Try to resize bus */
> >+ if (pci_grow_bus(bus, max + 1))
> >+ goto out;
>
> On some platforms, like powerpc, we have some limitations of the bus number a
> bridge could have. Sometimes, we need the start bus number to be power 2
> aligned.
Huh. I have to admit that I'm getting tired of all the powerpc-specific
PCI hacks. It's hard enough to get this stuff working on hardware that
conforms to the spec, and scattering pcibios_*() hooks around makes the
code even harder to follow.
What would happen if powerpc used PCI_PROBE_ONLY? Do you really depend on
the PCI core to configure anything for you, or does your firmware set
everything up the way it needs to be?
Changing bridge configuration seems like something we should avoid under
PCI_PROBE_ONLY (I haven't read Andreas' patch in detail, so I don't know if
that's how it works). If PCI_PROBE_ONLY would work for powerpc, then we
wouldn't have an issue here.
Bjorn
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