>>>> if (pcie_bus_config == PCIE_BUS_TUNE_OFF) {
>>>> + pcie_bus_update_set(dev);
>>>
>>> You're only adding this to the PCIE_BUS_TUNE_OFF path. Can't the same
>>> problem occur for other pcie_bus_config settings?
>>
>> We only found the problem during PCIE_BUS_TUNE_OFF set. Other mode like PCIE_BUS_SAFE and PCIE_BUS_PEER2PEER.
>> This issue won't happen.
>
> Sorry, I can't parse this. Are you saying the problem won't happen in
> the other modes? Why not?
Hi Bjorn, when in PCIE_BUS_SAFE mode, pcie_find_smpss() will find the largest available mpss in a pcie path.
Then call pcie_bus_configure_set() to set all devices' mps to the largest available mps in this path, so
all devices in the path will have the same mps. When in PCIE_BUS_PEER2PEER, all devices' mps will be set to 128B
for safety. And to the PCIE_BUS_PERFORMANCE mode, I found Jon's comment in pcie_write_mps(),
/* For "Performance", the assumption is made that
* downstream communication will never be larger than
* the MRRS. So, the MPS only needs to be configured
* for the upstream communication. This being the case, <------
* walk from the top down and set the MPS of the child
* to that of the parent bus.
So I think the problem won't happen in other modes.
Thanks!
Yijing.
>
>>>> pcie_bus_detect_mps(dev);
>>>> return 0;
>>>> }
>
> .
>
--
Thanks!
Yijing
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