RE: [PATCH] PCIe: SPEAr13XX: Pass config resource through reg property

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Hello Pratyush,

> -----Original Message-----
> From: Pratyush ANAND
> Sent: Thursday, August 28, 2014 9:01 AM
> To: Mohit KUMAR DCG
> Cc: linux-pci@xxxxxxxxxxxxxxx; Pratyush ANAND
> Subject: [PATCH] PCIe: SPEAr13XX: Pass config resource through reg
> property
> 
> PCIe configuration space should be passed through reg property, rather than
> through ranges property. This patch does the correction for SPEAr13XX SOCs.
> 
> Signed-off-by: Pratyush Anand <pratyush.anand@xxxxxx>
> ---
>  arch/arm/boot/dts/spear1310.dtsi  | 18 +++++++++---------
> arch/arm/boot/dts/spear1340.dtsi  |  6 +++---  drivers/pci/host/pcie-
> spear13xx.c |  2 +-
>  3 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/spear1310.dtsi
> b/arch/arm/boot/dts/spear1310.dtsi
> index fa5f2bb5f106..51de3876caf4 100644
> --- a/arch/arm/boot/dts/spear1310.dtsi
> +++ b/arch/arm/boot/dts/spear1310.dtsi
> @@ -85,7 +85,8 @@
> 
>  		pcie0: pcie@b1000000 {
>  			compatible = "st,spear1340-pcie", "snps,dw-pcie";
> -			reg = <0xb1000000 0x4000>;
> +			reg = <0xb1000000 0x4000>, <0x80000000 0x20000>;
> +			reg-names = "dbi", "config";
>  			interrupts = <0 68 0x4>;
>  			interrupt-map-mask = <0 0 0 0>;
>  			interrupt-map = <0x0 0 &gic 0 68 0x4>; @@ -95,15
> +96,15 @@
>  			#address-cells = <3>;
>  			#size-cells = <2>;
>  			device_type = "pci";
> -			ranges = <0x00000800 0 0x80000000 0x80000000 0
> 0x00020000   /* configuration space */
> -				0x81000000 0 0	 0x80020000 0 0x00010000   /*
> downstream I/O */
> +			ranges = <0x81000000 0 0	 0x80020000 0
> 0x00010000   /* downstream I/O */
>  				0x82000000 0 0x80030000 0xc0030000 0
> 0x0ffd0000>; /* non-prefetchable memory */
>  			status = "disabled";
>  		};
> 
>  		pcie1: pcie@b1800000 {
>  			compatible = "st,spear1340-pcie", "snps,dw-pcie";
> -			reg = <0xb1800000 0x4000>;
> +			reg = <0xb1000000 0x4000>, <0x90000000 0x20000>;

- should be reg = <0xb18000000 0x4000>, <0x90000000 0x20000>;

> +			reg-names = "dbi", "config";
>  			interrupts = <0 69 0x4>;
>  			interrupt-map-mask = <0 0 0 0>;
>  			interrupt-map = <0x0 0 &gic 0 69 0x4>; @@ -113,15
> +114,15 @@
>  			#address-cells = <3>;
>  			#size-cells = <2>;
>  			device_type = "pci";
> -			ranges = <0x00000800 0 0x90000000 0x90000000 0
> 0x00020000   /* configuration space */
> -				0x81000000 0 0  0x90020000 0 0x00010000   /*
> downstream I/O */
> +			ranges = <0x81000000 0 0  0x90020000 0 0x00010000
> /* downstream I/O */
>  				0x82000000 0 0x90030000 0x90030000 0
> 0x0ffd0000>; /* non-prefetchable memory */
>  			status = "disabled";
>  		};
> 
>  		pcie2: pcie@b4000000 {
>  			compatible = "st,spear1340-pcie", "snps,dw-pcie";
> -			reg = <0xb4000000 0x4000>;
> +			reg = <0xb1000000 0x4000>, <0xc0000000 0x20000>;

- should be reg = <0xb4000000 0x4000>, <0xc0000000 0x20000>;

Otherwise looks good and removes warning "spear-pcie b4000000.pcie: missing
 *config* reg space", now config space is passed as reg property.

Thanks
Mohit
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