On Wednesday 18 June 2014 14:38:43 Kishon Vijay Abraham I wrote:
> On Thursday 29 May 2014 12:08 PM, Kishon Vijay Abraham I wrote:
> >
> > Here the CPU address for configuration space is 0x20013000 and the controller
> > address for configuration space is 0x13000. The controller address should be
> > used while programming the ATU (in order for translation to happen properly in
> > DRA7xx).
>
> I've fixed this up with what you suggested in the v1 of the series. Do you
> think this is fine?
Hi Kishon,
Yes, I think this will work and do the right thing in all cases. I'm not
completely sure if the change should be generalized into the range
parser or better kept in the pcie-designware driver as you do it here:
> > @@ -406,6 +413,12 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> > pp->config.cfg1_size = resource_size(cfg_res)/2;
> > pp->cfg0_base = cfg_res->start;
> > pp->cfg1_base = cfg_res->start + pp->config.cfg0_size;
> > +
> > + /* Find the untranslated configuration space address */
> > + index = of_property_match_string(np, "reg-names", "config");
> > + addrp = of_get_address(np, index, false, false);
> > + pp->cfg0_mod_addr = of_read_number(addrp, ns);
> > + pp->cfg1_mod_addr = pp->cfg0_mod_addr + pp->config.cfg0_size;
I think I've recently seen some objections to hand-parsing standard
properties in driver code.
> > } else {
> > dev_err(pp->dev, "missing *config* reg space\n");
> > }
> > @@ -431,12 +444,20 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> > pp->config.io_size = resource_size(&pp->io);
> > pp->config.io_bus_addr = range.pci_addr;
> > pp->io_base = range.cpu_addr;
> > +
> > + /* Find the untranslated IO space address */
> > + pp->io_mod_addr = of_read_number(parser.range -
> > + parser.np + na, ns);
> > }
So the of_read_number() call could be moved into of_pci_range_to_resource(),
with another field added to struct of_pci_range to carry the address on
the parent bus. Any other thoughts on this? Maybe Rob Herring or Andrew
Murray have a strong opinion on this.
Arnd
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