[PATCH RFC 0/4] PCI: pciehp: Fix Command Completion handling

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Yinghai has been working on pciehp timeouts related to a hardware
erratum in Intel, AMD, and Nvidia hotplug controllers.  This affects
the way we wait for command completion on those controllers.

I had some suggestions about how to change pciehp to make this work
better in general, without having to check for specific vendors.  We
need something that works well on hardware that conforms to the spec,
as well as the stuff that doesn't.

I haven't heard anything for a while, so I wrote up these patches to
make my proposals concrete.  Unfortunately, I can't easily test any of
this, so I'm posting these for comment and possible testing if anybody
is ambitious.

The Intel erratum is CF118, described here:
http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html
---

Bjorn Helgaas (4):
      PCI: pciehp: Make pcie_wait_cmd() self-contained
      PCI: pciehp: Wait for hotplug command completion lazily
      PCI: pciehp: Compute timeout from hotplug command start time
      PCI: pciehp: Remove assumptions about which commands cause completion events


 drivers/pci/hotplug/pciehp.h     |    2 +
 drivers/pci/hotplug/pciehp_hpc.c |   91 +++++++++++++++++---------------------
 2 files changed, 42 insertions(+), 51 deletions(-)
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