Jiang, On Mon, 19 May 2014, Thomas Gleixner wrote: > > We may build hierarchy irqdomains as below for x86, > > [IOAPIC] [MSI/MSI-x] [HPET] [DMAR] [Legacy] > > | | | | | > > v v v | | > > [ Remapping ] | | > > | | | > > v v v > > [ Root/vector ] > > > > For x86, irq_alloc_info_t structure will be used to host CPU mask, > > device pointer, IOAPIC pin attributes, NUMA node info etc. > > Do we really need to hand all of this down? having recovered from a 24hr travel, I think we really only need to hand down cpumask. If you want to allocate a vector, all the vector domain needs to know is the cpumask and the number of consecutive vectors you want to allocate. The IOAPIC pin attribute is only interesting inside the ioapic domain, there is no need to have it elsewhere. Numa node is encoded in the cpumask, IOW the node info selects only bits for that node in the mask. Same for the device. It's only relevant for setting up MSI[x] or legacy PCI interrupts. But the underlying vector domain does not care at all about it. Thanks, tglx -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
