On Wed, Apr 16, 2014 at 9:20 PM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote:
> On Wed, Apr 16, 2014 at 3:11 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:
>
>>>
>>> - if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
>>> + if (ret < 0 &&
>>> + (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) ==
>>> + (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) {
>>> + /*
>>> + * That failed.
>>> + *
>>> + * Try below 4g pref
>>> + */
>>> + ret = pci_bus_alloc_resource(bus, res, size, align, min,
>>> + IORESOURCE_PREFETCH,
>>> + pcibios_align_resource, dev);
>>> + }
>>
>> pci_bus_alloc_from_region() already has a mechanism for restricting
>> allocation to certain bus addresses. I don't like this second mechanism of
>> also using IORESOURCE_MEM_64. There's too much implicit state -- I think
>> there's a dependency here on how we manage the IORESOURCE_MEM_64 bit in the
>> bridge window resources. That makes this code hard to understand.
>>
>
> will drop that.
After more checking, found out that we still need the change.
Reason:
We size pref,mmio64 at first, and then put pref without 64 under nonpref.
If bridge have pref/mmio64, and mmio32, children have pref/mmio64, and
pref/mmio32.
then during sizing: children pref/mmio64 is under bridge pref/mmio64,
children pref/mmio32
is under bridge mmio32.
If during allocation, bridge pref/mmio64 still could get allocation under 4G.
then without this change we could put children pref/mmio32 under that.
could be ok, we would put children pref/mm64 under bridge mmio32.
But in some case size could be different, then could be fail if bridge
mmio32 is small then bridge pref/mmio64.
Please check latest v9, with comments change.
Thanks
Yinghai
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