I have a kernel space testcode which does below after all enumeration and driver loading is done: 1. read BARx address of endpoint from its config space 2. ioremap this physical address to get virtual address 3. read this virtual address using readl/readw api Query is: 1. Does read in point 3 above happens through PCIE interface? 2. Is it upstream or downstream traffic? 3. Could we do corresponding write also? -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html