On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: > On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei <tom.leiming@xxxxxxxxx> wrote: >> Hi Bjorn, >> >> I found this patch broke virtio-pci devices. > > Thanks a lot for testing this. > >> On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: >>> Don't rely on BAR contents when the command register says the BAR is >>> disabled. >>> >>> If we receive a PCI device from firmware (or a hot-added device that was >>> just powered up) with the MEMORY or IO enable bits in the PCI command >>> register cleared, there's no reason to believe the BARs contain valid >>> addresses. >> >> From PCI LOCAL BUS SPECIFICATION, REV. 3.0, both >> PCI_COMMAND_IO and PCI_COMMAND_MEM should be >> cleared after reset, so looks the patch sets IORESOURCE_UNSET >> too early because PCI drivers may call pci_enable_device() >> (->pci_enable_resources()) to enable the two bits of >> PCI_COMMAND explicitly. > > The point is that it's not safe to enable those two bits unless we're > certain that the BARs they control contain valid values that don't > conflict with anything else in the system. > > Maybe we should only set IORESOURCE_UNSET when we find a conflict or a > BAR that's not contained by an upstream bridge window, and we should > try to reallocate then. I'm pretty sure we do that at least in some > cases, but it would probably simplify things if we did it more > consistently, and maybe we shouldn't set it at all here in > __pci_read_base(). I think so because __pci_read_base() is called in device emulation path. > > But I'd like to understand your situation better, so can you provide > more details, please? Complete before/after dmesg logs would go a > long way toward illustrating the problem you're seeing. Please see the two attachment log. The memory allocation failure is caused by mistaken value read from pci address after the device is failed to enable. Thanks, -- Ming Lei
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