RE: pcie designware question

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>> Mohit,
>>
>> I have checked with our hardware team and they confirmed that ATU
>> registers are not implemented in our PCIE
>
>Which PCIe designware IP version you are using? At least since version 3.71 support of
>viewport is available in IP. Older version was handling address translation using side band
>signals implemented through vendor specific application registers. May be your case is also
>similar.
>
Pratyush,

Thanks for responding.

Is there a register that I can poke to know the IP version. I have asked this to our
hardware folks to know the version. I guess it is older than 3.71.

>> SS. So we need to have  a way to disable this in the core driver so
>> that  we can handle it in our glue layer driver.
>> But this will be a regression on the existing driver. How do we handle this?
>
>May be you can add rd/wr_other_conf in struct pcie_host_ops.
>Change designware driver to handle vendor specific rd/wr_other_conf, if it exists, else use
>generic rd/wr_other_conf.
>
Yes, that is indeed what I did to solve this. I will be sending a patch for this once
my driver is tested.

Murali
>In your vendor specific rd/wr_other_conf handler you can implement translation using your
>application registers.
>
>Regards
>Pratyush
>>
>> Murali
>>
>>
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