On Wednesday, August 28, 2013 8:54 PM, Seungwon Jeon wrote:
>
> read/write operation for I/O mem is wrapped with hiding
> base address inside in order to simplify the usage.
> [elbi_base, phy_base, block_base]
>
> Signed-off-by: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>
Thank you for sending the patch.
It looks good except one minor thing below mentioned.
Also, I tested this patch on Exynos5440.
Acked-by: Jingoo Han <jg1.han@xxxxxxxxxxx>
Best regards,
Jingoo Han
> ---
> drivers/pci/host/pci-exynos.c | 161 +++++++++++++++++++++++------------------
> 1 files changed, 91 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
> index 012ca8a..da6ad6f 100644
> --- a/drivers/pci/host/pci-exynos.c
> +++ b/drivers/pci/host/pci-exynos.c
> @@ -61,7 +61,6 @@ struct exynos_pcie {
> #define PCIE_ELBI_SLV_AWMISC 0x11c
> #define PCIE_ELBI_SLV_ARMISC 0x120
> #define PCIE_ELBI_SLV_DBI_ENABLE (0x1 << 21)
> -
But, this removing one line is not necessary.
> /* PCIe Purple registers */
> #define PCIE_PHY_GLOBAL_RESET 0x000
> #define PCIE_PHY_COMMON_RESET 0x004
> @@ -91,19 +90,49 @@ struct exynos_pcie {
> #define PCIE_PHY_TRSV3_RXCDR 0x2ec
> #define PCIE_PHY_TRSV3_LVCC 0x31c
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