On Thu, Aug 15, 2013 at 10:26:07AM -0300, Mauro Carvalho Chehab wrote:
> I mean that the edac core needs to know that, on a given system, the
> BIOS is accessing the hardware registers and sending the data via
> ghes_edac.
Right, that's the firmware-first thing which Naveen did - see
mce_disable_bank.
> No. As we want that fatal errors to also be properly reported, the
> kernel will still need to know the memory layout.
Read what I said: if you have the silkscreen label you don't need the
memory layout - you *already* *know* which DIMM is affected.
Also, fatal errors are a whole different beast where we run in NMI
context or we even don't get to run the #MC handler on some systems.
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
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