On 12/10/2012 12:38 PM, Benjamin Herrenschmidt wrote: > On Mon, 2012-12-10 at 21:43 +0000, Grant Likely wrote: >>> Sorry for my pci ignorance (have never got hw for mb/zynq) >>> I just want to get better overview how we should we our drivers to >> be compatible. >>> >>> Does it mean that pci is supposed be always 64 bit wide? >>> And there is no option to have just 32bit values. >> >> Yes, PCIe addressing is always 64 bits wide. Even on 32bit PCI systems >> we use 64 bit PCI addressing in the device tree. > > Right. The size & format of an address cell for PCI is specified in the > OF PCI bindings and we follow that binding. It's always 3 cells. .. and the reason why it must be 3 cells, even if the host PCI bus only supports 32-bit addressing, is because a plug-in PCI card has no way of knowing what the host supports. > > Cheers, > Ben. > > > _______________________________________________ > devicetree-discuss mailing list > devicetree-discuss@xxxxxxxxxxxxxxxx > https://lists.ozlabs.org/listinfo/devicetree-discuss > -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
