On Wed, Dec 5, 2012 at 1:57 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:
> Add and use #defines for PCI-X Capability registers and fields.
> Note that the PCI-X Capability has a different layout for
> type 0 (endpoint) and type 1 (bridge) devices.
I added the following patches from this series to my -next branch and
plan to merge them in the v2.8 merge window next week. The non-PCI
ones have been acked and the maintainers are OK with merging them
through the PCI tree.
* pci/bjorn-pcie-cap:
iwlwifi: Use standard #defines for PCIe Capability ASPM fields
iwlwifi: collapse wrapper for pcie_capability_read_word()
iwlegacy: Use standard #defines for PCIe Capability ASPM fields
iwlegacy: collapse wrapper for pcie_capability_read_word()
cxgb3: Use standard #defines for PCIe Capability ASPM fields
PCI: Add standard PCIe Capability Link ASPM field names
PCI/portdrv: Use PCI Express Capability accessors
PCI: Use standard PCIe Capability Link register field names
PCI: Add and use standard PCI-X Capability register names
I did not merge the following patches. They depend on one of the
patches above and the e1000e one conflicts with other patches in the
queue. So these can be merged at any time after v3.8-rc1 (or even
before -rc1 as long as it's after the PCI -next branch is merged).
ath9k: Use standard #defines for PCIe Capability ASPM fields
e1000e: Use standard #defines for PCIe Capability ASPM fields
[SCSI] qla2xxx: Use standard PCIe Capability Link register field names
Bjorn
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