> > +#define correctable_error_string \
> > + {BIT(0), "Receiver Error"}, \
> > + {BIT(6), "Bad TLP"}, \
> > + {BIT(7), "Bad DLLP"}, \
> > + {BIT(8), "RELAY_NUM Rollover"}, \
> > + {BIT(12), "Replay Timer Timeout"}, \
> > + {BIT(13), "Advisory Non-Fatal"}
>
> Hmm... isn't something missing here? I'm seeing more bits defined at
> the
> PCIe V3.0 spec for Offset 10h:
>
> bit 14 - Corrected Internal Error
> bit 15 - Header Log Overflow
>
> > +#define uncorrectable_error_string \
> > + {BIT(4), "Data Link Protocol"}, \
> > + {BIT(12), "Poisoned TLP"}, \
> > + {BIT(13), "Flow Control Protocol"}, \
> > + {BIT(14), "Completion Timeout"}, \
> > + {BIT(15), "Completer Abort"}, \
> > + {BIT(16), "Unexpected Completion"}, \
> > + {BIT(17), "Receiver Overflow"}, \
> > + {BIT(18), "Malformed TLP"}, \
> > + {BIT(19), "ECRC"}, \
> > + {BIT(20), "Unsupported Request"}
>
> Hmm... isn't something missing here? I'm seeing more bits defined at
> the
> PCIe V3.0 spec for Offset 04h:
>
> bit 5 - Surprise Down Error
> bit 21 - ACS Violation
> bit 22 - Uncorrectable Internal Error
> bit 23 - MC Blocked TLP
> bit 24 - AtomicOp Egress Blocked
> bit 25 - TLP Prefix Blocked Error
>
I used the same errors defined in the string arrays at the top of aerdrv_errprint.c. I am not sure why they were left out in that file. I will investigate and probably add them as a later patch and then include them in aerdrv_errprint.c also.
Sound good?
Lance
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