(2012/10/16 2:17), Khalid Aziz wrote:
> On Mon, 2012-10-15 at 16:00 +0900, Takao Indoh wrote:
>> This patch resets PCIe devices at boot time by hot reset when
>> "reset_devices" is specified.
>>
>> Signed-off-by: Takao Indoh <indou.takao@xxxxxxxxxxxxxx>
>> ---
>> arch/x86/include/asm/pci-direct.h | 1
>> arch/x86/kernel/setup.c | 3
>> arch/x86/pci/early.c | 344 ++++++++++++++++++++++++++++
>> include/linux/pci.h | 2
>> init/main.c | 4
>> 5 files changed, 352 insertions(+), 2 deletions(-)
>>
>
>
> Looks good.
>
> Reviewed-by: Khalid Aziz <khalid@xxxxxxxxxxxxxx>
>
Thanks! But unfortunately I found a bug, so I'll post v5 patch soon.
A bug I found is that configuration register is accessed without
delay after reset.
This is an algorithm to reset devices.
for (each device) { <===== (A)
if (does not have downstream devices)
continue
for (each downstream device) {
save config registers
}
do_bus_reset <==== (B)
}
wait 500 ms
...
Let's say my system has the following devices.
00:01.0 (root port)
|
+- 01:00.0 (device)
In this case,
1) At first, 00:01.0 is found at (A). And its downstream devcice 01:00.0
is reset at (B).
2) Next, 01:00.0 is found at (A). Then config register of 01:00.0 is
accessed. This is PCIe spec violation because the config register of
01:00.0 is accessed without delay after reset. PCIe spec requires
at least 100ms waiting time before sending a config request.
Therefore I'll update patches like this so that devices could be reset
after saving phase is done:
for (each device) {
if (does not have downstream devices)
continue
for_each (its downstream devices) {
save config registers
}
- do_bus_reset
}
+ for (each device) {
+ do_bus_reset
+ }
wait 500 ms
...
Thanks,
Takao Indoh
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