From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Currently, pci_bridge_d3_possible() encodes a variety of decision factors when deciding whether a given bridge can be put into D3. A particular one of note is for "recent enough PCIe ports." Per Rafael [0]: "There were hardware issues related to PM on x86 platforms predating the introduction of Connected Standby in Windows. For instance, programming a port into D3hot by writing to its PMCSR might cause the PCIe link behind it to go down and the only way to revive it was to power cycle the Root Complex. And similar." Thus, this function contains a DMI-based check for post-2015 BIOS. The above factors (Windows, x86) don't really apply to non-x86 systems, and also, many such systems don't have BIOS or DMI. However, we'd like to be able to suspend bridges on non-x86 systems too. Restrict the "recent enough" check to x86. If we find further incompatibilities, it probably makes sense to expand on the deny-list approach (i.e., bridge_d3_blacklist or similar). Link: https://lore.kernel.org/linux-pci/CAJZ5v0j_6jeMAQ7eFkZBe5Yi+USGzysxAgfemYh=-zq4h5W+Qg@xxxxxxxxxxxxxx/ [0] Link: https://lore.kernel.org/linux-pci/20240227225442.GA249898@bhelgaas/ [1] Link: https://lore.kernel.org/linux-pci/20240828210705.GA37859@bhelgaas/ [2] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> [Brian: rewrite to !X86 based on Rafael's suggestions] Signed-off-by: Brian Norris <briannorris@xxxxxxxxxxxx> --- Based on prior work by Manivannan Sadhasivam that was part of a bigger series that stalled: [PATCH v5 4/4] PCI: Allow PCI bridges to go to D3Hot on all Devicetree based platforms https://lore.kernel.org/linux-pci/20240802-pci-bridge-d3-v5-4-2426dd9e8e27@xxxxxxxxxx/ I'm resubmitting this single patch, since it's useful and seemingly had agreement. Changes in v6: - Include more background lore (thanks Rafael) - Switch to "non-x86" instead of "uses Device Tree" condition Changes in v5: - Pulled out of the larger series, as there were more controversial changes in there, while this one had agreement (Link [1][2]). - Rewritten with a relaxed set of rules, because the above patch required us to modify many device trees to add bridge nodes. drivers/pci/pci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index ff69f3d653ce..4d7c9f64ea24 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3031,7 +3031,7 @@ static const struct dmi_system_id bridge_d3_blacklist[] = { * @bridge: Bridge to check * * This function checks if it is possible to move the bridge to D3. - * Currently we only allow D3 for recent enough PCIe ports and Thunderbolt. + * Currently we only allow D3 for some PCIe ports and for Thunderbolt. */ bool pci_bridge_d3_possible(struct pci_dev *bridge) { @@ -3075,10 +3075,10 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) return false; /* - * It should be safe to put PCIe ports from 2015 or newer - * to D3. + * Out of caution, we only allow PCIe ports from 2015 or newer + * into D3 on x86. */ - if (dmi_get_bios_year() >= 2015) + if (!IS_ENABLED(CONFIG_X86) || dmi_get_bios_year() >= 2015) return true; break; } -- 2.49.0.395.g12beb8f557-goog
