Hello Frank, all, On Tue, Mar 04, 2025 at 12:49:34PM -0500, Frank Li wrote: > This patches basic on > https://lore.kernel.org/imx/20250128-pci_fixup_addr-v9-0-3c4bb506f665@xxxxxxx/ > > I have not hardware to test and there are not axis,artpec7-pcie in kernel > tree. If you do a simple: $ git grep artpec7 You will see that there are just two drivers that support this SoC: drivers/pci/controller/dwc/pcie-artpec6.c drivers/crypto/axis/artpec6_crypto.c and their matching DT bindings: Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt Documentation/devicetree/bindings/crypto/artpec6-crypto.txt I think that at some point in the there was an intent to upstream support for the ARTPEC-7 SoC, but now many years later, that hasn't happened, as there is not even a artpec7 dtsi. I think the nicest thing to the community is to drop artpec7 support from these two drivers, and deprecate the artpec7 compatibles in the DT bindings, as it is obviously making your life harder when trying to do improvements. > > Look for driver owner, who help test this and start move forward to remove > cpu_addr_fixup() work. While I'm the original author of this PCIe driver, I do no longer have access to the hardware and documentation, so I cannot test. For anyone interested in the cleanup Frank is doing, see: https://lore.kernel.org/linux-pci/Z8d96Qbggv117LlO@lizhi-Precision-Tower-5810/T/#m0ff14edaf871293ba16acd85e7942adacb603c6c Looking at your cover-letter for the series above, creating a simple-bus with: ranges = <0x0 0xc0000000 0x20000000> and handling that in PCIe DWC common code does look nicer compared to having a .cpu_addr_fixup() callback in each PCIe DWC glue driver. Hopefully someone with access to the hardware can test your series + this RFC. Kind regards, Niklas
