On Mon, Mar 3, 2025 at 11:20 PM Dan Williams <dan.j.williams@xxxxxxxxx> wrote:
>
> The limited number of link-encryption (IDE) streams that a given set of
> host bridges supports is a platform specific detail. Provide
> pci_ide_init_nr_streams() as a generic facility for either platform TSM
> drivers, or PCI core native IDE, to report the number available streams.
> After invoking pci_ide_init_nr_streams() an "available_secure_streams"
> attribute appears in PCI host bridge sysfs to convey that count.
>
> Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Cc: Lukas Wunner <lukas@xxxxxxxxx>
> Cc: Samuel Ortiz <sameo@xxxxxxxxxxxx>
> Cc: Alexey Kardashevskiy <aik@xxxxxxx>
> Cc: Xu Yilun <yilun.xu@xxxxxxxxxxxxxxx>
> Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx>
> ---
> .../ABI/testing/sysfs-devices-pci-host-bridge | 12 ++++
> drivers/pci/ide.c | 58 ++++++++++++++++++++
> drivers/pci/pci.h | 3 +
> drivers/pci/probe.c | 12 ++++
> include/linux/pci.h | 8 +++
> 5 files changed, 92 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-devices-pci-host-bridge b/Documentation/ABI/testing/sysfs-devices-pci-host-bridge
> index 51dc9eed9353..4624469e56d4 100644
> --- a/Documentation/ABI/testing/sysfs-devices-pci-host-bridge
> +++ b/Documentation/ABI/testing/sysfs-devices-pci-host-bridge
> @@ -20,6 +20,7 @@ What: pciDDDD:BB/streamH.R.E:DDDD:BB:DD:F
> Date: December, 2024
> Contact: linux-pci@xxxxxxxxxxxxxxx
> Description:
> +<<<<<<< current
Drop?
> (RO) When a platform has established a secure connection, PCIe
> IDE, between two Partner Ports, this symlink appears. The
> primary function is to account the stream slot / resources
> @@ -30,3 +31,14 @@ Description:
> assigned Selective IDE Stream Register Block in the Root Port
> and Endpoint, and H represents a platform specific pool of
> stream resources shared by the Root Ports in a host bridge.
> +
> +What: pciDDDD:BB/available_secure_streams
> +Date: December, 2024
> +Contact: linux-pci@xxxxxxxxxxxxxxx
> +Description:
> + (RO) When a host bridge has Root Ports that support PCIe IDE
> + (link encryption and integrity protection) there may be a
> + limited number of streams that can be used for establishing new
> + secure links. This attribute decrements upon secure link setup,
> + and increments upon secure link teardown. The in-use stream
> + count is determined by counting stream symlinks.
Please describe the expected form metavariables DDDD and BB will take.
> diff --git a/drivers/pci/ide.c b/drivers/pci/ide.c
> index b2091f6260e6..0c72985e6a65 100644
> --- a/drivers/pci/ide.c
> +++ b/drivers/pci/ide.c
> @@ -439,3 +439,61 @@ void pci_ide_stream_disable(struct pci_dev *pdev, struct pci_ide *ide)
> pci_write_config_dword(pdev, pos + PCI_IDE_SEL_CTL, 0);
> }
> EXPORT_SYMBOL_GPL(pci_ide_stream_disable);
> +
> +static ssize_t available_secure_streams_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + struct pci_host_bridge *hb = to_pci_host_bridge(dev);
> + int avail;
> +
> + if (hb->nr_ide_streams < 0)
> + return -ENXIO;
> +
> + avail = hb->nr_ide_streams -
> + bitmap_weight(hb->ide_stream_map, hb->nr_ide_streams);
> + return sysfs_emit(buf, "%d\n", avail);
> +}
> +static DEVICE_ATTR_RO(available_secure_streams);
> +
> +static struct attribute *pci_ide_attrs[] = {
> + &dev_attr_available_secure_streams.attr,
> + NULL,
> +};
> +
> +static umode_t pci_ide_attr_visible(struct kobject *kobj, struct attribute *a, int n)
> +{
> + struct device *dev = kobj_to_dev(kobj);
> + struct pci_host_bridge *hb = to_pci_host_bridge(dev);
> +
> + if (a == &dev_attr_available_secure_streams.attr)
> + if (hb->nr_ide_streams < 0)
> + return 0;
> +
> + return a->mode;
> +}
> +
> +struct attribute_group pci_ide_attr_group = {
> + .attrs = pci_ide_attrs,
> + .is_visible = pci_ide_attr_visible,
> +};
> +
> +/**
> + * pci_init_nr_ide_streams() - size the pool of IDE Stream resources
/size/sets the size of/
> + * @hb: host bridge boundary for the stream pool
> + * @nr: number of streams
> + *
> + * Enable IDE Stream establishment by setting the number of stream
> + * resources available at the host bridge. Platform init code must set
> + * this before the first pci_ide_stream_alloc() call.
Is failing to call this a caught error by pci_ide_stream_alloc?
> + *
> + * The "PCI_IDE" symbol namespace is required because this is typically
> + * a detail that is settled in early PCI init, i.e. only an expert or
> + * test module should consume this export.
Perhaps start with "Expert use only"?
> + */
> +void pci_ide_init_nr_streams(struct pci_host_bridge *hb, int nr)
> +{
> + hb->nr_ide_streams = nr;
> + sysfs_update_group(&hb->dev.kobj, &pci_ide_attr_group);
> +}
> +EXPORT_SYMBOL_NS_GPL(pci_ide_init_nr_streams, "PCI_IDE");
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index b38bdd91e742..6c050eb9a91b 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -458,8 +458,11 @@ static inline void pci_npem_remove(struct pci_dev *dev) { }
>
> #ifdef CONFIG_PCI_IDE
> void pci_ide_init(struct pci_dev *dev);
> +extern struct attribute_group pci_ide_attr_group;
> +#define PCI_IDE_ATTR_GROUP (&pci_ide_attr_group)
> #else
> static inline void pci_ide_init(struct pci_dev *dev) { }
> +#define PCI_IDE_ATTR_GROUP NULL
> #endif
>
> #ifdef CONFIG_PCI_TSM
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index e1c915629864..a383cc32c84b 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -633,6 +633,16 @@ static void pci_release_host_bridge_dev(struct device *dev)
> kfree(bridge);
> }
>
> +static const struct attribute_group *pci_host_bridge_groups[] = {
> + PCI_IDE_ATTR_GROUP,
> + NULL,
> +};
> +
> +static const struct device_type pci_host_bridge_type = {
> + .groups = pci_host_bridge_groups,
> + .release = pci_release_host_bridge_dev,
> +};
> +
> static void pci_init_host_bridge(struct pci_host_bridge *bridge)
> {
> INIT_LIST_HEAD(&bridge->windows);
> @@ -652,6 +662,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
> bridge->native_dpc = 1;
> bridge->domain_nr = PCI_DOMAIN_NR_NOT_SET;
> bridge->native_cxl_error = 1;
> + bridge->dev.type = &pci_host_bridge_type;
>
> device_initialize(&bridge->dev);
> }
> @@ -665,7 +676,6 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
> return NULL;
>
> pci_init_host_bridge(bridge);
> - bridge->dev.release = pci_release_host_bridge_dev;
>
> return bridge;
> }
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 0f9d6aece346..c2f18f31f7a7 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -660,6 +660,14 @@ void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
> void (*release_fn)(struct pci_host_bridge *),
> void *release_data);
>
> +#ifdef CONFIG_PCI_IDE
> +void pci_ide_init_nr_streams(struct pci_host_bridge *hb, int nr);
> +#else
> +static inline void pci_ide_init_nr_streams(struct pci_host_bridge *hb, int nr)
> +{
> +}
> +#endif
> +
> int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
>
> #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
>
>
--
-Dionna Glaze, PhD, CISSP, CCSP (she/her)
