On Tue, Mar 04, 2025 at 03:53:57PM +0800, Chen Wang wrote: > I think it should be v2, right? :) > Yeah, I have made a mistake. This is v2, not v1. > On 2025/3/4 15:12, Inochi Amaoto wrote: > > Sophgo's SG2044 SoC uses Synopsys Designware PCIe core > > to implement RC mode. > > > > For legacy interrupt, the PCIe controller on SG2044 implement > > its own legacy interrupt controller. For MSI/MSI-X, it use an > > external interrupt controller to handle. > > > > The external MSI interrupt controller patch can be found on [1]. > > As SG2044 needs a mirror change to support the way to send MSI > > message and different irq number. > > > > [1] https://lore.kernel.org/all/20250303111648.1337543-1-inochiama@xxxxxxxxx > > > > Changed from v1: > > - https://lore.kernel.org/all/20250221013758.370936-1-inochiama@xxxxxxxxxx > > 1. patch 1: remove dma-coherent property > > 2. patch 2: remove unused reset > > 3. patch 2: fix Kconfig menu title and reorder the entry > > 4. patch 2: use FIELD_GET/FIELD_PREP to simplify the code. > > 5. patch 2: rename the irq handle function to match the irq_chip name > > > > Inochi Amaoto (2): > > dt-bindings: pci: Add Sophgo SG2044 PCIe host > > PCI: sophgo-dwc: Add Sophgo SG2044 PCIe driver > > > > .../bindings/pci/sophgo,sg2044-pcie.yaml | 122 ++++++++ > > drivers/pci/controller/dwc/Kconfig | 10 + > > drivers/pci/controller/dwc/Makefile | 1 + > > drivers/pci/controller/dwc/pcie-dw-sophgo.c | 270 ++++++++++++++++++ > > 4 files changed, 403 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pci/sophgo,sg2044-pcie.yaml > > create mode 100644 drivers/pci/controller/dwc/pcie-dw-sophgo.c > > > > -- > > 2.48.1 > >
