Hello,
[...]
> > +static ssize_t counter_value_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
> > +{
> > + struct dwc_pcie_rasdes_priv *pdata = file->private_data;
> > + struct dw_pcie *pci = pdata->pci;
> > + struct dwc_pcie_rasdes_info *rinfo = pci->debugfs->rasdes_info;
> > + char debugfs_buf[DWC_DEBUGFS_BUF_MAX];
> > + ssize_t pos;
> > + u32 val;
> > +
> > + mutex_lock(&rinfo->reg_event_lock);
> > + set_event_number(pdata, pci, rinfo);
> > + val = dw_pcie_readl_dbi(pci, rinfo->ras_cap_offset + RAS_DES_EVENT_COUNTER_DATA_REG);
> > + mutex_unlock(&rinfo->reg_event_lock);
> > + pos = scnprintf(debugfs_buf, DWC_DEBUGFS_BUF_MAX, "Counter value: %d\n", val);
> > +
> > + return simple_read_from_buffer(buf, count, ppos, debugfs_buf, pos);
> > +}
>
> Do we need to check whether the counter is enabled or not for the event
> before retrieving the counter value?
I believe, we have a patch that aims to address, have a look at:
https://lore.kernel.org/linux-pci/20250225171239.19574-1-manivannan.sadhasivam@xxxxxxxxxx
Thank you!
Krzysztof
