Hello, > Cadence reference manual cdn_pcie_gen4_hpa_axi_ips_ug_v1.04.pdf, section > 9.1.7.1 'AXI Subordinate to PCIe Address Translation' mentions that > axi_s_awaddr bits 16 when set, corresponds to MSG with data and when not > set, MSG without data. > > But the driver is doing the opposite and due to this, INTx is never > received on the host. So fix the driver to reflect the documentation and > also make INTx work. Applied to controller/cadence, thank you! Krzysztof