On Thu, Feb 27, 2025 at 07:25:32PM +0530, Muni Sekhar wrote: > Hi all, > > I am currently working on a project involving a Xilinx FPGA connected > to an x86 CPU via a PCIe root port. The Xilinx FPGA functions as a > PCIe endpoint with single function capability and is programmed to > emulate the Soundwire Master controller. It can be dynamically > reprogrammed to emulate other interfaces as needed. Essentially, the > FPGA emulates an interface and connects to the CPU via the PCIe bus. > > Given this setup, the BIOS does not have prior knowledge of the > function implemented in the Xilinx FPGA PCIe endpoint. I have a couple > of questions regarding this configuration: > > Is it possible to define an ACPI Device Tree representation for this > type of hardware setup? > Can we achieve ACPI-based device enumeration with this configuration? If the FPGA is programmed before BIOS enumerates PCI devices, the FPGA would look just like any other PCI device, and BIOS would be able to read the Vendor ID and Device ID and would be able to size and program the BARs. So I assume the FPGA is not programmed before BIOS enumeration, the FPGA doesn't respond at all when BIOS or Linux reads the Vendor ID, and you want to program the FPGA later and make Linux enumerate to find it.
