If the platform doesn't support an event counter, enabling it using the
'counter_enable' debugfs attribute currently will succeed. But reading the
debugfs attribute back will return 'Counter Disabled'.
This could cause confusion to the users. So while enabling an event
counter in counter_enable_write(), always read back the status to check if
the counter is enabled or not. If not, return -EOPNOTSUPP to let the users
know that the event counter is not supported.
Fixes: 9f99c304c467 ("PCI: dwc: Add debugfs based Statistical Counter support for DWC")
Suggested-by: Niklas Cassel <cassel@xxxxxxxxxx>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
---
.../pci/controller/dwc/pcie-designware-debugfs.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-debugfs.c b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
index 9ff4d45e80f1..1f1bd9888327 100644
--- a/drivers/pci/controller/dwc/pcie-designware-debugfs.c
+++ b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
@@ -352,6 +352,21 @@ static ssize_t counter_enable_write(struct file *file, const char __user *buf,
val |= FIELD_PREP(EVENT_COUNTER_ENABLE, PER_EVENT_OFF);
dw_pcie_writel_dbi(pci, rinfo->ras_cap_offset + RAS_DES_EVENT_COUNTER_CTRL_REG, val);
+
+ /*
+ * While enabling the counter, always read back the status to check if
+ * it is enabled or not. Return error if it is not enabled to let the
+ * users know that the counter is not supported on the platform.
+ */
+ if (enable) {
+ val = dw_pcie_readl_dbi(pci, rinfo->ras_cap_offset +
+ RAS_DES_EVENT_COUNTER_CTRL_REG);
+ if (!FIELD_GET(EVENT_COUNTER_STATUS, val)) {
+ mutex_unlock(&rinfo->reg_event_lock);
+ return -EOPNOTSUPP;
+ }
+ }
+
mutex_unlock(&rinfo->reg_event_lock);
return count;
--
2.25.1
