Introduce `reset-gpios` property to enable GPIO-based control of the PCIe RP PERST# signal, generating assert and deassert signals. Signed-off-by: Sai Krishna Musham <sai.krishna.musham@xxxxxxx> --- This patch depends on the following patch series. https://lore.kernel.org/all/20250217072713.635643-2-thippeswamy.havalige@xxxxxxx/ --- .../devicetree/bindings/pci/xilinx-versal-cpm.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml index b63a759ec2d7..293ed36d0cea 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml @@ -33,6 +33,9 @@ properties: - const: cpm_csr minItems: 2 + reset-gpios: + description: GPIO used as PERST# signal. Please refer to pci.txt. + interrupts: maxItems: 1 @@ -63,6 +66,7 @@ properties: required: - reg - reg-names + - reset-gpios - "#interrupt-cells" - interrupts - interrupt-map @@ -99,6 +103,7 @@ examples: reg = <0x0 0xfca10000 0x0 0x1000>, <0x6 0x00000000 0x0 0x10000000>; reg-names = "cpm_slcr", "cfg"; + reset-gpios = <&gpio1 38 0x01>; pcie_intc_0: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; @@ -127,6 +132,7 @@ examples: <0x06 0x00000000 0x00 0x1000000>, <0x00 0xfce20000 0x00 0x1000000>; reg-names = "cpm_slcr", "cfg", "cpm_csr"; + reset-gpios = <&gpio1 38 0x01>; pcie_intc_1: interrupt-controller { #address-cells = <0>; -- 2.44.1
