On Sat, Feb 22, 2025 at 11:43:44AM +0100, Lorenzo Bianconi wrote: > Introduce the mediatek,pbus-csr property for the pbus-csr syscon node > available on EN7581 SoC. The airoha pbus-csr block provides a configuration > interface for the PBUS controller used to detect if a given address is > accessible on PCIe controller. > > Signed-off-by: Lorenzo Bianconi <lorenzo@xxxxxxxxxx> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> - Mani > --- > .../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > index f05aab2b1addcac91d4685d7d94f421814822b92..162406e0691a81044406aa8f9e60605d0d917811 100644 > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > @@ -109,6 +109,17 @@ properties: > power-domains: > maxItems: 1 > > + mediatek,pbus-csr: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to pbus-csr syscon > + - description: offset of pbus-csr base address register > + - description: offset of pbus-csr base address mask register > + description: > + Phandle with two arguments to the syscon node used to detect if > + a given address is accessible on PCIe controller. > + > '#interrupt-cells': > const: 1 > > @@ -168,6 +179,8 @@ allOf: > minItems: 1 > maxItems: 2 > > + mediatek,pbus-csr: false > + > - if: > properties: > compatible: > @@ -197,6 +210,8 @@ allOf: > minItems: 1 > maxItems: 2 > > + mediatek,pbus-csr: false > + > - if: > properties: > compatible: > @@ -224,6 +239,8 @@ allOf: > minItems: 1 > maxItems: 2 > > + mediatek,pbus-csr: false > + > - if: > properties: > compatible: > > -- > 2.48.1 > -- மணிவண்ணன் சதாசிவம்
