On Thu, Feb 20, 2025 at 09:30:34AM +0800, Zhiyuan Dai wrote:
> PCI Express Base Spec r6.0 defines BAR size up to 8 EB (2^63 bytes),
> but supporting anything bigger than 128TB requires changes to pci_rebar_get_possible_sizes()
> to read the additional Capability bits from the Control register.
>
> If 8EB support is required, callers will need to be updated to handle u64 instead of u32.
> For now, support is limited to 128TB, and support for sizes greater than 128TB can be
> deferred to a later time.
Did you run ./scripts/checkpatch.pl on this?
I'm guessing that you will see:
Prefer a maximum 75 chars per line (possible unwrapped commit description?)
With that fixed:
Reviewed-by: Niklas Cassel <cassel@xxxxxxxxxx>
>
> Signed-off-by: Zhiyuan Dai <daizhiyuan@xxxxxxxxxxxxxx>
> ---
> drivers/pci/pci.c | 4 ++--
> include/uapi/linux/pci_regs.h | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 661f98c6c63a..77b9ceefb4e1 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -3752,7 +3752,7 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
> * @bar: BAR to query
> *
> * Get the possible sizes of a resizable BAR as bitmask defined in the spec
> - * (bit 0=1MB, bit 19=512GB). Returns 0 if BAR isn't resizable.
> + * (bit 0=1MB, bit 31=128TB). Returns 0 if BAR isn't resizable.
> */
> u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
> {
> @@ -3800,7 +3800,7 @@ int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
> * pci_rebar_set_size - set a new size for a BAR
> * @pdev: PCI device
> * @bar: BAR to set size to
> - * @size: new size as defined in the spec (0=1MB, 19=512GB)
> + * @size: new size as defined in the spec (0=1MB, 31=128TB)
> *
> * Set the new size of a BAR as defined in the spec.
> * Returns zero if resizing was successful, error code otherwise.
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 1601c7ed5fab..ce99d4f34ce5 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -1013,7 +1013,7 @@
>
> /* Resizable BARs */
> #define PCI_REBAR_CAP 4 /* capability register */
> -#define PCI_REBAR_CAP_SIZES 0x00FFFFF0 /* supported BAR sizes */
> +#define PCI_REBAR_CAP_SIZES 0xFFFFFFF0 /* supported BAR sizes */
> #define PCI_REBAR_CTRL 8 /* control register */
> #define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */
> #define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */
> --
> 2.43.0
>
