On Tue, Feb 18, 2025 at 10:21:21AM +0100, Niklas Cassel wrote: > From: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx> > > This patch moves PCI_VENDOR_ID_ROCKCHIP from pci_endpoint_test.c to > pci_ids.h. And reuse it in pcie-rockchip-host.c. > > Cc: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > Cc: Krzysztof Wilczynski <kw@xxxxxxxxx> > Cc: Lorenzo Pieralisi <lpieralisi@xxxxxxxxxx> > Signed-off-by: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx> > Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx> Applied to pci/controller/rockchip for v6.15, thanks. > --- > Hello PCI maintainers, > > This patch was previously part of of series that seems to have stagnated. > Bjorn did provide his Ack on this patch for that series, however, I suggest > that this patch is merged by the PCI tree. > (Shradha's series will be merged via PCI tree, so we will need this patch > in PCI tree anyway to enable Rockchip in the DWC specific debugfs file.) > > drivers/misc/pci_endpoint_test.c | 1 - > drivers/pci/controller/pcie-rockchip-host.c | 2 +- > drivers/pci/controller/pcie-rockchip.h | 1 - > include/linux/pci_ids.h | 2 ++ > 4 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c > index d5ac71a49386..b002740acf8d 100644 > --- a/drivers/misc/pci_endpoint_test.c > +++ b/drivers/misc/pci_endpoint_test.c > @@ -88,7 +88,6 @@ > #define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025 > #define PCI_DEVICE_ID_RENESAS_R8A779F0 0x0031 > > -#define PCI_VENDOR_ID_ROCKCHIP 0x1d87 > #define PCI_DEVICE_ID_ROCKCHIP_RK3588 0x3588 > > static DEFINE_IDA(pci_endpoint_test_ida); > diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c > index 5adac6adc046..6a46be17aa91 100644 > --- a/drivers/pci/controller/pcie-rockchip-host.c > +++ b/drivers/pci/controller/pcie-rockchip-host.c > @@ -367,7 +367,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip) > } > } > > - rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID, > + rockchip_pcie_write(rockchip, PCI_VENDOR_ID_ROCKCHIP, > PCIE_CORE_CONFIG_VENDOR); > rockchip_pcie_write(rockchip, > PCI_CLASS_BRIDGE_PCI_NORMAL << 8, > diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h > index 11def598534b..14954f43e5e9 100644 > --- a/drivers/pci/controller/pcie-rockchip.h > +++ b/drivers/pci/controller/pcie-rockchip.h > @@ -200,7 +200,6 @@ > #define AXI_WRAPPER_NOR_MSG 0xc > > #define PCIE_RC_SEND_PME_OFF 0x11960 > -#define ROCKCHIP_VENDOR_ID 0x1d87 > #define PCIE_LINK_IS_L2(x) \ > (((x) & PCIE_CLIENT_DEBUG_LTSSM_MASK) == PCIE_CLIENT_DEBUG_LTSSM_L2) > #define PCIE_LINK_TRAINING_DONE(x) \ > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > index de5deb1a0118..e1a270e7e0c5 100644 > --- a/include/linux/pci_ids.h > +++ b/include/linux/pci_ids.h > @@ -2609,6 +2609,8 @@ > > #define PCI_VENDOR_ID_ZHAOXIN 0x1d17 > > +#define PCI_VENDOR_ID_ROCKCHIP 0x1d87 > + > #define PCI_VENDOR_ID_HYGON 0x1d94 > > #define PCI_VENDOR_ID_META 0x1d9b > -- > 2.48.1 >
