From: Thierry Reding <treding@xxxxxxxxxx>
This enables the syscore callbacks to obtain the PCI context without
relying on a separate global variable.
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
arch/mips/pci/pci-alchemy.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index a20de7160b6b..02f0616518e1 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -33,6 +33,7 @@
struct alchemy_pci_context {
struct pci_controller alchemy_pci_ctrl; /* leave as first member! */
+ struct syscore_ops pmops;
void __iomem *regs; /* ctrl base */
/* tools for wired entry for config space access */
unsigned long last_elo0;
@@ -46,6 +47,12 @@ struct alchemy_pci_context {
int (*board_pci_idsel)(unsigned int devsel, int assert);
};
+static inline struct alchemy_pci_context *
+syscore_to_pci_context(struct syscore_ops *ops)
+{
+ return container_of(ops, struct alchemy_pci_context, pmops);
+}
+
/* for syscore_ops. There's only one PCI controller on Alchemy chips, so this
* should suffice for now.
*/
@@ -306,9 +313,7 @@ static int alchemy_pci_def_idsel(unsigned int devsel, int assert)
/* save PCI controller register contents. */
static int alchemy_pci_suspend(struct syscore_ops *ops)
{
- struct alchemy_pci_context *ctx = __alchemy_pci_ctx;
- if (!ctx)
- return 0;
+ struct alchemy_pci_context *ctx = syscore_to_pci_context(ops);
ctx->pm[0] = __raw_readl(ctx->regs + PCI_REG_CMEM);
ctx->pm[1] = __raw_readl(ctx->regs + PCI_REG_CONFIG) & 0x0009ffff;
@@ -328,9 +333,7 @@ static int alchemy_pci_suspend(struct syscore_ops *ops)
static void alchemy_pci_resume(struct syscore_ops *ops)
{
- struct alchemy_pci_context *ctx = __alchemy_pci_ctx;
- if (!ctx)
- return;
+ struct alchemy_pci_context *ctx = syscore_to_pci_context(ops);
__raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM);
__raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH);
@@ -354,11 +357,6 @@ static void alchemy_pci_resume(struct syscore_ops *ops)
alchemy_pci_wired_entry(ctx); /* install it */
}
-static struct syscore_ops alchemy_pci_pmops = {
- .suspend = alchemy_pci_suspend,
- .resume = alchemy_pci_resume,
-};
-
static int alchemy_pci_probe(struct platform_device *pdev)
{
struct alchemy_pci_platdata *pd = pdev->dev.platform_data;
@@ -478,7 +476,9 @@ static int alchemy_pci_probe(struct platform_device *pdev)
__alchemy_pci_ctx = ctx;
platform_set_drvdata(pdev, ctx);
- register_syscore_ops(&alchemy_pci_pmops);
+ ctx->pmops.suspend = alchemy_pci_suspend;
+ ctx->pmops.resume = alchemy_pci_resume;
+ register_syscore_ops(&ctx->pmops);
register_pci_controller(&ctx->alchemy_pci_ctrl);
dev_info(&pdev->dev, "PCI controller at %ld MHz\n",
--
2.48.1
